Smart or chip cards are very frequently used in applications, e.g. banking, requiring a high level of security against fraudulent use.
Usually, a smart card component is an integrated circuit having a read-only memory or (ROM), an erasable programmable read-only memory or (EPROM), a central processor or (CPU) and a random access memory or (RAM). It can incorporate an electrically erasable programmable read-only memory or (EEPROM). The CPU is a member of the microprocessor type using a runnable program fixed at the time of the manufacture of the component in the ROM, as well as data entered in the EPROM during the different stages, e.g. personalization, which follow the manufacture of the component and extend up to the delivery of the card to the customer. The RAM enables the CPU to enter and use temporary data during its operation. It is erased when the card is no longer energized.
A conventional ROM includes bit lines arranged to extend a first direction, which is a vertical direction in the figure. The bit lines are formed in a first layer. In a second layer located above the first layer, conductive lines are formed to extend parallel to the bit lines. According to the conventional ROM layout, a cross-talk phenomenon occurs at regions where the bit line and conductive line are overlapped. As a result, the ROM may not operate properly. In the ROM, a pre-charged level is decreased to “L” level; and therefore, “H” data may misread as “L” data.